Many world's largest technology companies are very interested in the role of information technology in the design of integrated circuits. For example, some companies are considering using machine learning in the design of NVIDIA integrated circuits. Cadence focuses on using artificial intelligence simulation tools in China to improve verification and power consumption analysis.
Another company has shown interest in this concept since 2000. Last year, it was Google. Considering the artificial intelligence trend of IC design, this article will discuss how Google uses artificial intelligence to accelerate the IC design process and its impact on daily electronic equipment.
Google's IC cloth planning artificial intelligence
One of the most time -consuming aspects of any IC design is the chip layout, that is, while meeting the design constraints, the layout of various circuit modules is to optimize power consumption, area, performance and signal integrity.
Google's thesis discusses the application of "deep strengthening learning" in chip layout. This is a solution to accelerate IC design published in "Nature".
Google's solution uses a specially developed -based graphical neural network, which uses the chip mesh as input and generates edges and macro embedded as output. The output is then passed to the feed neural network, and the network output has a study of the characteristics of chip characteristics. This process continues to repeat, optimizing the average line length, congestion, area, power and performance.
This process may complete the chip layout planning within a small part of humans. In addition, this technology can also analyze more design possibilities than humans, so that it can spit out cheaper and smaller chip design in a shorter time.
Although this possible solution sounds like a method that helps to speed up the IC design process, and generally speaking, it helps EES's workflow, it does raise some problems. One question is, how can this affect electrical engineers?
Enlightenment to engineers
In many fields, people are afraid of AI to snatch their work, and electrical engineering is no exception; however, the question is: Is this fear legal?
The first thing to consider is that, as usual, just like Google, these design artificial intelligence replaces lower -level design attention points. Therefore, the general empirical law may be that if something has the potential to automate, it may not need to be deeply knowledgeable, and it may not be a good use of engineers' time.
From this perspective, this increasing automation can be regarded as a good thing that can be regarded as EES, allowing them to focus on more important design aspects. However, more complicated stages in the IC design process often require deeper professional knowledge, applied specific knowledge and many years of training, which makes it unlikely to be automated by artificial intelligence (at least currently).
On the other hand, people who work in areas that require less professional knowledge may be afraid that their work will be replaced by automation, which is a reasonable concern. However, no matter how good artificial intelligence becomes, the IC design is still too expensive, and it cannot tolerate computer work without human engineers' vision testing and signing.
Layout engineers are more likely to lose their jobs. Their roles will transfer a large number of physical layout to analysis, verification, and confirmation of designs completed by artificial intelligence software.
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