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HomeNewsThe future of power semiconductors is bright, and electronic packaging is becoming more and more important

The future of power semiconductors is bright, and electronic packaging is becoming more and more important

Jan15
The power semiconductor market is expected to grow significantly in the coming years, driven by the adoption of electric vehicles and renewable energy, while also driving dramatic changes in the packaging required to protect and connect these devices.

Packaging plays an increasingly important role in the transition to higher power densities, enabling more efficient power supplies, power transfer, faster conversion, and greater reliability. As the world moves to faster switching frequencies and higher power densities, there are related changes in the materials used for substrates, chip attach, wire bonding and system cooling.

“As we make advances in the silicon itself, packaging starts to become more and more important,” Brian LaValle, director of mid-power voltage MOSFETs at Infineon, said in a recent webinar.

In terms of high power and high current, power modules are available in discrete packages and integrated modules, giving manufacturers a competitive advantage based on device specifications and usage conditions. Hundreds of discrete power devices are available from leading companies, but some of the most common include through-hole packages, such as the TO-247 and TO-220 with long silver leads, and leaded surface mount (SMT) components, such as the D2PAK , DPAK, SO-8 and leadless (TOLL), PQFN and CSP.

Top-cooled SMT can provide lower thermal resistance because the drain plate is directly connected to the heat sink. This approach also improves switching performance due to smaller gate loops in SMTs. The exposed source pad can be flush with the heat sink to increase the current capability of the device. Total solutions include efficient thermal management via single- or double-sided cooling, as well as multi-chip integration in frames or molded modules.

According to Amkor, the power quad flat no-lead (PQFN) package is one of the most popular options today. This is due to its compact size (3 x 3mm to 8 x 8mm), low parasitics (enabling very low on-resistance [RDS(on)]),excellent thermal performance, and numerous multi-chip, multi-clip and Wire changes. PQFN is also GaN compatible and features lead-free plating and halogen-free molding compound, automotive wettable flanks, and dual heatsink options.

Amkor also uses a variety of SiC-compatible processes, including volumetric SiC dicing, large-gauge wire bonding, and automotive-compliant test and burn-in services. “Amkor is one of the first OSATs to offer silicon carbide packaging to electric vehicle manufacturers,” said Sivakumar Mohandass, corporate vice president of Amkor’s Wire Bonding and Power Business Unit.“We provide testing and burn-in services for all power solutions, providing our customers with turnkey solutions.”

Drivers and Applications
Power devices are the transistors and diodes that start, stop, or regulate power in electronic systems. Power electronics are ubiquitous in our lives, and the drive towards net-zero emissions is expected to double the market size from $22 billion in 2022 to $44 billion in just a few years (2025/2026). In fact, McKinsey estimates silicon carbide power devices alone will grow at a compound annual growth rate of 26% between 2022 and 2030.

Discrete power devices and power modules are used in areas such as transportation, power grids, energy storage, computing, 5G infrastructure, chargers and industrial drives. The new power packaging (including testing) market accounts for 20% to 25% of the entire semiconductor power market.

Equipment is divided into low voltage,medium voltage and high voltage categories,closely related to low current, medium current and high current. Just a decade ago,it was still the norm to calculate drives rated at 30V and 40V.Today's voltage levels range from 40V to 150V. This change is driving the shift from silicon MOSFETs and IGBTs to those based on silicon carbide (SiC) and gallium nitride (GaN),whose wide bandgaps enable higher switching power characteristics, higher operation in smaller sizes frequency and lower RDS(on). footprint.[Note: An insulated gate bipolar transistor combines an input MOSFET with an output bipolar junction transistor.]

In smart power applications, efficiency is the most important selection factor. In contrast, automotive applications require power losses to be kept to an absolute minimum. SiC devices operate at higher temperatures and are comparable in price to silicon systems, making SiC the material of choice for on-board charging of battery electric vehicles, traction inverters and DC-DC conversion.

Power switches are very efficient,but even the most efficient switches come with operational trade-offs. Package inductance and resistance directly affect conduction and switching losses.

The structure of power devices is different from CMOS FETs. They are vertical devices rather than planar devices, and they do not scale like CMOS devices. Still, there are ways to scale effectively. "Although there is a lot of R&D activity in microfluidic cooling, you can connect two identical chips and cool them from both sides by using direct bonded copper (DBC) (commonly used today," said Sam Sadri, senior process engineer at QP airflow) to reduce size." technology.

Direct bonding to copper is typically a two-layer process where the backside of the substrate is a solid, featureless sheet of copper, and the top copper layer is structured using wet chemical etching to form circuit traces. The bottom copper layer is usually soldered to the heat sink or heat sink.

For complex devices such as power modules, collaborative optimization of design technology and process technology is becoming more and more common. Synopsys, Cadence, and other EDA companies recommend the use of DTCO for devices from the beginning of system design planning. For example, Synopsys PrimePower products enable accurate power analysis of block-level and full-chip designs, starting from RTL and progressing through various implementation stages to power signoff. The implementation includes gate-level power analysis driven by RTL and gate-level activity and detailed power-level reliability signoff.

The larger the chip size, the greater the mechanical challenges associated with different material properties, especially the coefficient of thermal expansion (CTE). Power modules operate at higher junction temperatures, repeatedly reaching 150°C to 200°C, which stresses the materials. "There are also electrical requirements, such as loop inductance. For example, when you design a power supply, you have to understand the electrical characteristics because under normal conditions there may not be a problem. But when there is a surge, damage can occur," QP Technologies’ Sadri said. "The other is obviously mechanical properties. When the CTEs don't match, when the two materials heat and cool, they expand and contract at different rates, creating mechanical stresses - for example, silicon has a CTE of about 4, while copper's The CTE is approximately 17 (ppm/°C)."

The replacement of silicon IGBTs with SiC MOSFETs in automotive inverters and other applications is also driving changes in assembly and packaging. Because of its higher operating temperature, it requires large gauge wire bonds, copper clips, silver sintering and more conductive molding compounds. SiC is almost as hard as diamond, so segmentation uses this material (diamond-coated blades) to mechanically separate the chips. 3D-Micromac has developed a faster and potentially less destructive process that uses Thermal Laser Sawing (TLS-Dicing) in a two-step scribing and cutting process.

Lightning fast switch
Power electronics consists of power conversion switches that convert battery power into electricity to drive motors, as well as powertrain solutions for managing and reducing fuel consumption and emissions in non-electric vehicles. Power devices (MOSFETs or IGBTs) can be discrete (single operating) devices or integrated modules, a type of system-in-package (SiP).

The operation of power devices always generates losses, including conduction losses and switching losses. As power semiconductor manufacturers move toward higher power densities, losses can be as high as 100V/cm2 at high junction temperatures. All insulation materials and interconnection methods must be designed to ensure that the system operates within specifications.

The enemies of power device operation are parasitic resistances, capacitances, and inductances, often collectively referred to as "parasitic effects." In addition to the general shift to SiC and GaN technologies, power packaging can be discrete or integrated, such as power management ICs or PMICs in modules. These modules can be frame-based or molded.

Power device packaging provides voltage isolation, electrical connectivity, mechanical stability, moisture protection, and heat dissipation for the device. When multiple chips are required, connect them in parallel in a module. For example, power modules for traction inverters with high voltage and current capabilities (up to 10kV) use copper-clad ceramic substrates. This layout uses wedge-shaped aluminum bonds to separate the potential and front contacts.

Aluminum nitride has the best thermal conductivity but poor mechanical strength. Aluminum oxide (Al 2 O 3 ) is the cheapest, but has low thermal conductivity. Very high currents up to 3-level topologies require multiple substrates, for example, in an automotive traction module measuring 50mm x 60mm (3.3kV, Inom of 1.5kA). The substrate can be copper or an aluminum-silver-copper alloy. Infineon's Olaf Holfeld noted that loss densities of 100W/cm 2 and operating temperatures of 150 to 200°C are common.

Over the years, chip connection materials have changed from lead-based solder to sintered silver. Sintering is a process that uses temperature (and in many cases pressure) to bond nanoscale particles together while connecting adjacent surfaces. Copper can also be used for sintering. Infineon estimates that the bonding reliability of sintered silver chip connections is 20 times higher than that of conventional solder. For wire bonding, aluminum or copper will be chosen depending on the length, but copper can handle twice the current as silver.

The reliability of the chip-to-substrate connection depends on the stack's ability to withstand power cycling and temperature fluctuations. Toyo Ink recently launched a nanosilver chip bonding material that exhibits a thermal conductivity of 300W/mK and an adhesive strength of 40 MPa in automotive applications. It dispenses at temperatures from 230°to 300°C using pressure-free or pressure-assisted conditions. At the same time, sintered silver paste can withstand higher operating temperatures and has a thinner bonding layer thickness than traditional solder.

“Sintered silver contains so much silver that it performs much better than gold-tin or solder, which are the typical methods of connecting power chips,” said QP Technologies’ Sadri.

Although there are many packaging technologies for power devices, engineers choose the architecture, interconnection and assembly method that best matches the chip's performance specifications (specific resistance, Rds(on) and gate current), while the cost is almost always a important factors factors.

For complex device types, co-optimization of design technology and process technology is becoming more and more common. Synopsys, Cadence, and other EDA companies recommend the use of DTCO for devices from the beginning of system design planning. Synopsys PrimePower products enable accurate power analysis of block-level and full-chip designs, starting from RTL and progressing through various implementation stages to power signoff.

As with DTCO, design for manufacturability (DFM) is critical for power devices. "Engineers can build anything. But we need to build thousands or even millions of devices with the same performance and reliability. So that's where DFM is really important, that's key," Sadri added.

Embedded substrate method
One way engineers can minimize parasitic effects is by using embedded chip substrates. Here, power devices (MOSFETs, IGBTs) and passive components are integrated into a substrate (a stack of organic laminate layers) and connected using copper-plated vias and conductive traces in the substrate. Shorter interconnects minimize distortion and power loss while reducing electrical and thermal resistance.

One way engineers can minimize parasitic effects is by using embedded chip substrates. Here, power devices (MOSFETs, IGBTs) and passive components are integrated into a substrate (a stack of organic laminate layers) and connected using copper-plated vias and conductive traces in the substrate. Shorter interconnects minimize distortion and power loss while reducing electrical and thermal resistance.

In conclusion

The materials used in power semiconductor assembly are changing as historic silicon devices are replaced by SiC devices with faster switching behavior and higher temperature capabilities. Packaging companies are beginning to adopt leadless packages such as TOLL or power CSP, as well as surface mount devices in space-critical applications.

With the current focus on pure electric vehicles and clean energy sources such as solar and wind, the need for reliable power and conversion is expected to grow rapidly. As silicon carbide power device performance and reliability improve, materials such as sintered silver and direct bonded copper will be increasingly adopted to provide higher reliability power systems in a smaller overall footprint.

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